Sharp MZ-3500 Manual do Utilizador Página 87
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M/3500
10-5. keyboard controller signal description
PIN
No
Porality
signal
name
IN/OUT
Function
1
TO IN Output data signal from the sub CPU (D<0)
2
XT A LI IN Internal clock oscillator crystal input
3
XTAL2
IN
Internal clock oscillator crystal input
4
RESET IN
Processor initiatire
5
SS IN + 5V
6
INT
IN
Strove of D(C) that also is used for interrupt to the keyboard side (ST(0)
7
EA IN GND
8
RD
-
NC
9
PSEN
-
NC
10
WR
-
NC
11
ALE
-
NC
12 DBO
IN RETURN signal from the keyboard is input when a key is pushed during key search
19
DB7
20
GND IN OV supply
21 P20
OUT
Output data signal from key (D(K))
22
P21 OUT
Strobe of D{K) which also is used for interrupt to the CPU side (ST(K))
23
24
P22
P23
fN
Not used
25
PROG
-
NC
26
Vdo
IN
+ 5V
27
P10
OUT
Strobe to the keyboard unit by which a hexadecimal code is sent out for generation shift pulses
30
P13
to terminals XO X15 of the 4515 decorder during key search
31
P14
-
NC
32 PI 5 Pins used to activate the keytop embeded LED
OUT
#32 pm Alphabets and symbols (LOCK)
34
P17 #33 and #34 are not used
35
P24
IN
Not used
36 P25
IN
Keyboard type identifier pin Keyboard type is identified by mears of KSO, KS1, KS2 of KUCI
38 P27
an KUS2. whether it is GND or NC
39
T1 IN
Acknowledge input from the CPU (ACK(O) Sent only when the CPU receives a correct data
40
Vcc
IN
+ 5V supply
11. SELF CHECK FUNCTIONS
The -3500 performs self-check test during initial program
loading of the ROM. 11-1.
Test regarding the main CPU
1) MFD l/F, 128KB RAM, 16KB ROM (for ROM based
machine) checks
[Procedure]
1. Turn on all dip switches of the 4 bit switch (located in
the middle of the front side of the board) and turn on
all dip switches of the 2 bit unit on the front side of the
board.
2. Insert a floppy disk into drive unit No 2 (the third drive
unit)
3. Turn the power on
4. The LED flickers for a moment then the test program
starts During execution of the test program, the LED
stays unlit About four seconds later the result is
indicsted
(DISPLAY)
(1) LED comes activated after normal ending of the test
(2) LED flickers after abnormal ending of the test
The kind of error can be known by how the LED is activât
ed and flickered
- 94
LED (tor tdenitfication of GO/NO GO)
- SERVICE MANUAL 1
- 1. SPECIFICATIONS 2
- Keyboard layout 3
- 1-3. MZ-1U02 3
- 1-4. MZ-IR03 4
- 1-6. MZ-1R06 5
- 1-7. MZ-1D07 6
- 2-1. SDO (INITIALIZE STATE) 8
- MAIN CPU 8
- M* )S V 1 M/} 9
- MZS.'tOO 10
- 2.3. SD2 (ROM based BASIC) 11
- Operational description 12
- 3. CPU AND MEMORY 13
- L© 'MTR ! 14
- 3-3. Sub CPU and I/O port 15
- 1) Block diagram 16
- ‘ VK IN MEMCKT MM I Mf 20
- 4. CRT DISPLAY 22
- X 25 lines screen.) 24
- For Model 3200 senes 26
- 4-2. Video RAM 27
- 5) Synchronize signal timing 30
- X : Y - 1 : 2 30
- X : Y : 1 : 1 31
- 'iBK byte 32
- (option I) 32
- 48K byte 32
- (option tl) 32
- M Z 3500 34
- CSP 2 Block Diagram 37
- 20 GND IN 38
- ASCII C.G. Structure 40
- 4 9. VSYNC 41
- ARIO = HI 42
- > FIFO Empty? 44
- [Explanation] 45
- Straight line drawing 46
- Whereas 46
- 5. MFD INTERFACE 47
- ^ 0 ^ 0 1 49
- 8) Data write procedure 50
- 5^. FDC (UPD765) 52
- UPD765 signal description 53
- 5-5. Data recording method 54
- <ITE DATA 55
- Write pulse [] fl d fl R 56
- Polarity inversion 56
- +5V RtAD DATA 57
- M -- 3.1 58
- ©"T 58
- Advanced 59
- Does not trace i l^is 59
- 5-11. Media format 60
- (Bbyles) 61
- 02 0\ FF FF 62
- ( 2KX 152 = 304K ) 63
- Stop bit 64
- 6-4. System switch functions 65
- 6-5. 8251AC controls 65
- 2) Data output control 66
- 3) Data input control 67
- 7-D0C># 68
- 3iil>CPU of Ni^ 70
- <i> 71
- 7 4. Data transfer timing 72
- 7-6. I/O port map 73
- 8. OTHER INTERFACES 74
- -<3 ri> 75
- MZ,"500 76
- DIP SW(A) 79
- 1. BLOCK DIAGRAM 80
- A. +5V and +12V supplies 80
- M 7,3500 81
- 3. Alarm circuit 82
- DESCRIPTION 83
- 10-2. Key search timing 84
- JLJl_JlJT_ri_rLJl 85
- Power ON 86
- START (5mS) 86
- 11. SELF CHECK FUNCTIONS 87
- CD SDO bank alternation error 88
- 11-2. Sub-CPU side 89
- .8 test the 90
- 20 lines 90
- /<.y ^ Jf -y > K W 91
- 8) ROM-IPL 92
- S3Si-54Kl=-.*- • 93
- 12. IPL FLOW CHART 96
- MAIN CPU IPL FLOW CHART 2/2 97
- 12 2. SUB CPU IPL FLOW CHART 98
- ■ I I Y Y TV 99
- IjJliJlJjljJljJLllLljLLJ 99
- LlJ LiJ LiJ Lei LiJ LLl LiJ 99
- LJLeJ'LDliJLiJLLjLJLiJ 99
- Pi co vO co fO Pi 100
- Ч Г ^n UO 100
- ¿. ^ О 101
- Û. CM Û 101
- GUIDE LIST 102
- I'l Exteriors 103
- 1 Exteriors 104
- PWB & Fixing angles 105
- [3 Connector 106
- [4] Others 107
- 5 CPU PWB 107
- 5I CPU PWB 108
- U Power supply unit 108
- [6j Power supply unit 109
- П MZ1R06 (RAM board) 111
- SHARP CORPORATION 116
- Industrial Instruments Group 116
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