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MZ 3500
6) Screen overlay and displaying on two independent
CRT’s
As there are two video output channels it will be pos
sible to display two independent screens on separate
video display unit Overlay is possible on either of
screens (See preceding item 5) ) The following bit
selection is needed for screen overlay
Address Data
Internal
Hex
AS
AS
AS AS DS DS PS S gnal name
Function
3
2 1
0 2 0
of CSP
50 0
0 0
0
1 ECHI
Choice of outputting the character screen on CRT1 0 No 1 Yes
ECH2
Cho ce of outputting the character screen on CRT2 0 No 1 Yes
1
EAT2
Choice of whether attribute or cursor be put on the frame that displayed
on CRT2 (0 No 1 Yes)
51 0 0
0
1
SRI Displays on CRTI the blue elements contained m the VRAM
1
SR2
Displays on CRTI the red elements contained in the VRAM
1
SR3
Displays on CRTI the green elements contained in the VRAM
52
0
0
1
0 1
SR4
Displays on CRT2 the blue elements contained in the VRAM
1
SR5
Displays on CRT2 the red elements contained in the VRAM
1
SR6 Displays on CRT2 the green elements contained in the VRAM
53
0
0 1
1 1
BGC B
1 BGC R 1 Choice of background color display
1
BGC G
54
0
1
0
0 1 COLOR Color mode
1
1
BODER Border color mode in effect
55 0
1
0
1
1
08/16 Defines the data size for the graphic RAM (0 8 bits, 1 16 bits)
(5D)
1
40/80 Defines display digits for the character screen
1
<0 40 digits 1 80 digits)
56 0
1
1
0 1
RA-400
Connection of a 400 raster CRT
1
V RAM2
Connection of the 96K bytes VRAM
1 V RAM1
Connection of graphio GDC
57 0
1 1
1
1
1
1
25/20
25 lines/20 lines switching (0 25 lines, 1 20 lines)
5D 1 1 0 1
1 08/16
Defines data size for the graphic RAM (0 8 bits 1 16 bits)
1
40/80
Defines display digits for the character screen
1
(0 40 digits, 1 80 digits)
CSP 1
CSP 2
NOTE Both CRT1 and CRT2 must be high resolution CRT's (640 x 400) or medium resolution CRT’s fC40 y 'tftt))
Output to each CRT may be possible in the following combination .
Output to each CRT may be possible in the following
CRTI
CRT2
CH ( AT )
GF(AT)
CH AI )+(>! ^ AT)
CH(AT)
(.F AT)
CH(Arj+C.i Al
CH
(.F
CH+(,I
CH ASCII
GF Graphic screen, including overlay of two graphics
screens
(AT) Attached with attribute
- SERVICE MANUAL 1
- 1. SPECIFICATIONS 2
- Keyboard layout 3
- 1-3. MZ-1U02 3
- 1-4. MZ-IR03 4
- 1-6. MZ-1R06 5
- 1-7. MZ-1D07 6
- 2-1. SDO (INITIALIZE STATE) 8
- MAIN CPU 8
- M* )S V 1 M/} 9
- MZS.'tOO 10
- 2.3. SD2 (ROM based BASIC) 11
- Operational description 12
- 3. CPU AND MEMORY 13
- L© 'MTR ! 14
- 3-3. Sub CPU and I/O port 15
- 1) Block diagram 16
- ‘ VK IN MEMCKT MM I Mf 20
- 4. CRT DISPLAY 22
- X 25 lines screen.) 24
- For Model 3200 senes 26
- 4-2. Video RAM 27
- 5) Synchronize signal timing 30
- X : Y - 1 : 2 30
- X : Y : 1 : 1 31
- 'iBK byte 32
- (option I) 32
- 48K byte 32
- (option tl) 32
- M Z 3500 34
- CSP 2 Block Diagram 37
- 20 GND IN 38
- ASCII C.G. Structure 40
- 4 9. VSYNC 41
- ARIO = HI 42
- > FIFO Empty? 44
- [Explanation] 45
- Straight line drawing 46
- Whereas 46
- 5. MFD INTERFACE 47
- ^ 0 ^ 0 1 49
- 8) Data write procedure 50
- 5^. FDC (UPD765) 52
- UPD765 signal description 53
- 5-5. Data recording method 54
- <ITE DATA 55
- Write pulse [] fl d fl R 56
- Polarity inversion 56
- +5V RtAD DATA 57
- M -- 3.1 58
- ©"T 58
- Advanced 59
- Does not trace i l^is 59
- 5-11. Media format 60
- (Bbyles) 61
- 02 0\ FF FF 62
- ( 2KX 152 = 304K ) 63
- Stop bit 64
- 6-4. System switch functions 65
- 6-5. 8251AC controls 65
- 2) Data output control 66
- 3) Data input control 67
- 7-D0C># 68
- 3iil>CPU of Ni^ 70
- <i> 71
- 7 4. Data transfer timing 72
- 7-6. I/O port map 73
- 8. OTHER INTERFACES 74
- -<3 ri> 75
- MZ,"500 76
- DIP SW(A) 79
- 1. BLOCK DIAGRAM 80
- A. +5V and +12V supplies 80
- M 7,3500 81
- 3. Alarm circuit 82
- DESCRIPTION 83
- 10-2. Key search timing 84
- JLJl_JlJT_ri_rLJl 85
- Power ON 86
- START (5mS) 86
- 11. SELF CHECK FUNCTIONS 87
- CD SDO bank alternation error 88
- 11-2. Sub-CPU side 89
- .8 test the 90
- 20 lines 90
- /<.y ^ Jf -y > K W 91
- 8) ROM-IPL 92
- S3Si-54Kl=-.*- • 93
- 12. IPL FLOW CHART 96
- MAIN CPU IPL FLOW CHART 2/2 97
- 12 2. SUB CPU IPL FLOW CHART 98
- ■ I I Y Y TV 99
- IjJliJlJjljJljJLllLljLLJ 99
- LlJ LiJ LiJ Lei LiJ LLl LiJ 99
- LJLeJ'LDliJLiJLLjLJLiJ 99
- Pi co vO co fO Pi 100
- Ч Г ^n UO 100
- ¿. ^ О 101
- Û. CM Û 101
- GUIDE LIST 102
- I'l Exteriors 103
- 1 Exteriors 104
- PWB & Fixing angles 105
- [3 Connector 106
- [4] Others 107
- 5 CPU PWB 107
- 5I CPU PWB 108
- U Power supply unit 108
- [6j Power supply unit 109
- П MZ1R06 (RAM board) 111
- SHARP CORPORATION 116
- Industrial Instruments Group 116
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