Sharp MZ-3500 Manual do Utilizador Página 18
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M7-3S00
Pin No.
Polarity
IN/OUT Function
Signai Name
32
RF1B
OUT
Mam CPU 128KB dynamic RAM output buffer (LS244) output enable signal.
(RAM buffer 1)
33
RF2B
OUT
Signal identical to R F1 B For option RAM
(RAM buffer 2)
34
WATB
OUT
Wait signal to the mam CPU
(One wait cycle is applied during the memory fetch cycle of the main CPU. It consists of one dock
period) (WAIT)
35 RCMB
OUT
Chip select signat issued from the main CPU to select the RAM shared by the main CPU and
the sub-CPU
(RAM Common)
36
ITFB IN
Interrupt input from the UPD765 FDC (Floppy Disk Controller). |
(Interrupt from Floppy)
37
ITOB
IN
Interrupt input from the sub-CPU.
(Interrupt from No. 0)
38
39
IT1B
ÏT2B
IN
Interrupt input from slot 1 or 2.
(Interrupt from No. 1, 2)
40 MRQB IN
Memory request signal from the main CPU.
(Memory Request)
41
IN
Write signal from the mam CPU.
(Write)
42
43
IT3B
ÏT«
IN
Interrupt input from slot 3 or 4.
(Interrupt from No. 3, 4)
44
SEC IN
Input from the FDD (Floppy Disk Drive) assignment dip switch (A), No. 1.
*See the dip switch description, provided separately.
(Section)
45 GND
IN
Ground
46 Vcc
IN
5V supply
47
48
SW1
SW2
IN
Input from the svstem assignment dip switch.
*See The dip swtch description, provided separately.
49
AO
IN
Mam CPU address bus
Used in the I/O port select logic in the MMR to designate device number.
50
RFSH
IN
Refresh signal from the main CPU,
(Refresh)
61
52
SW3
SW4
IN
Input from the system assignment dip switch.
'See the dip switch description, provided separately.
53
GND IN
Ground
54
FD1
IN
Input from the system assignment dip switch.
'See the dip switch description, provided separately.
55
Vcc
IN 5V supply.
56
FD2
IN
Input from the FDD assignment dip switch (A), No. 2.
'See the dip swi*ch description, provided separately.
- 21 -
- SERVICE MANUAL 1
- 1. SPECIFICATIONS 2
- Keyboard layout 3
- 1-3. MZ-1U02 3
- 1-4. MZ-IR03 4
- 1-6. MZ-1R06 5
- 1-7. MZ-1D07 6
- 2-1. SDO (INITIALIZE STATE) 8
- MAIN CPU 8
- M* )S V 1 M/} 9
- MZS.'tOO 10
- 2.3. SD2 (ROM based BASIC) 11
- Operational description 12
- 3. CPU AND MEMORY 13
- L© 'MTR ! 14
- 3-3. Sub CPU and I/O port 15
- 1) Block diagram 16
- ‘ VK IN MEMCKT MM I Mf 20
- 4. CRT DISPLAY 22
- X 25 lines screen.) 24
- For Model 3200 senes 26
- 4-2. Video RAM 27
- 5) Synchronize signal timing 30
- X : Y - 1 : 2 30
- X : Y : 1 : 1 31
- 'iBK byte 32
- (option I) 32
- 48K byte 32
- (option tl) 32
- M Z 3500 34
- CSP 2 Block Diagram 37
- 20 GND IN 38
- ASCII C.G. Structure 40
- 4 9. VSYNC 41
- ARIO = HI 42
- > FIFO Empty? 44
- [Explanation] 45
- Straight line drawing 46
- Whereas 46
- 5. MFD INTERFACE 47
- ^ 0 ^ 0 1 49
- 8) Data write procedure 50
- 5^. FDC (UPD765) 52
- UPD765 signal description 53
- 5-5. Data recording method 54
- <ITE DATA 55
- Write pulse [] fl d fl R 56
- Polarity inversion 56
- +5V RtAD DATA 57
- M -- 3.1 58
- ©"T 58
- Advanced 59
- Does not trace i l^is 59
- 5-11. Media format 60
- (Bbyles) 61
- 02 0\ FF FF 62
- ( 2KX 152 = 304K ) 63
- Stop bit 64
- 6-4. System switch functions 65
- 6-5. 8251AC controls 65
- 2) Data output control 66
- 3) Data input control 67
- 7-D0C># 68
- 3iil>CPU of Ni^ 70
- <i> 71
- 7 4. Data transfer timing 72
- 7-6. I/O port map 73
- 8. OTHER INTERFACES 74
- -<3 ri> 75
- MZ,"500 76
- DIP SW(A) 79
- 1. BLOCK DIAGRAM 80
- A. +5V and +12V supplies 80
- M 7,3500 81
- 3. Alarm circuit 82
- DESCRIPTION 83
- 10-2. Key search timing 84
- JLJl_JlJT_ri_rLJl 85
- Power ON 86
- START (5mS) 86
- 11. SELF CHECK FUNCTIONS 87
- CD SDO bank alternation error 88
- 11-2. Sub-CPU side 89
- .8 test the 90
- 20 lines 90
- /<.y ^ Jf -y > K W 91
- 8) ROM-IPL 92
- S3Si-54Kl=-.*- • 93
- 12. IPL FLOW CHART 96
- MAIN CPU IPL FLOW CHART 2/2 97
- 12 2. SUB CPU IPL FLOW CHART 98
- ■ I I Y Y TV 99
- IjJliJlJjljJljJLllLljLLJ 99
- LlJ LiJ LiJ Lei LiJ LLl LiJ 99
- LJLeJ'LDliJLiJLLjLJLiJ 99
- Pi co vO co fO Pi 100
- Ч Г ^n UO 100
- ¿. ^ О 101
- Û. CM Û 101
- GUIDE LIST 102
- I'l Exteriors 103
- 1 Exteriors 104
- PWB & Fixing angles 105
- [3 Connector 106
- [4] Others 107
- 5 CPU PWB 107
- 5I CPU PWB 108
- U Power supply unit 108
- [6j Power supply unit 109
- П MZ1R06 (RAM board) 111
- SHARP CORPORATION 116
- Industrial Instruments Group 116
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